Advanced Packaging Tech for Mass Producing AI Chips
30 Domestic and Overseas Panel Sizes Flooding Market
TSMC Secures Single Design and Customers
Urgent Need for Korea to Establish Mid- to Long-Term Roadmap
Voices of concern are rising that panel-level packaging (PLP) technology, which South Korea commercialized for the first time, may become subordinate to Taiwan's TSMC camp due to the absence of domestic standards and an incomplete ecosystem.
PLP, based on rectangular panels rather than circular ones, is drawing attention as an advanced packaging technology for mass-producing artificial intelligence (AI) chips, offering advantages such as productivity enhancement and heat reduction.
According to the industry on August 23, PLP panels of various sizes—such as 310×310 mm, 415×510 mm, 600×600 mm, and 700×700 mm—are flooding the market, increasing the burden on semiconductor material and equipment companies. To date, the cumulative number of panel sizes produced by companies in South Korea and abroad exceeds 30 types.
An official from an equipment company explained, “Panel sizes vary wildly depending on whether factory lines converted to produce PLP panels were originally for substrates or LCDs. From the perspective of equipment companies, it is difficult to supply equipment according to different specifications requested by packaging companies every time, and yields inevitably decrease.”
The rectangular panels used in PLP are advantageous for implementing large-area AI semiconductor chips and have no discarded edges, making it possible to increase chip production yield. It is a next-generation packaging technology optimized for AI chips that are gradually growing larger.
Samsung commercialized Fan-Out Panel-Level Packaging (FO-PLP) technology for the first time in the world and applied it to mobile and wearable products, and based on this, the company is preparing to expand its application to the AI and high-performance computing (HPC) sectors.
With the spread of AI, the high-end (high-performance) PLP market is expected to open in earnest starting next year. A full-fledged head-to-head match with TSMC in the advanced packaging market is expected to materialize.
The problem is that, unlike existing circular silicon wafers that are mostly standardized at 300 mm, there is still no official standard for PLP panel sizes anywhere in South Korea or abroad. If sizes vary, equipment and material companies find it difficult to determine investment directions, and development costs and time become fragmented. Yields and product quality in the process also deteriorate.
In the case of Taiwan, TSMC clearly selected 310×310 mm as a pilot line in the high-end segment, creating a centralized structure where equipment, material, and OSAT (outsourced semiconductor assembly and test) companies unite in that direction. This was possible because they could continue to utilize 300 mm wafer process know-how accumulated over decades. This contrasts with South Korea's situation, where a leading company sets the standard and accelerates commercialization centered around an ecosystem.
Some cite following TSMC's standards as a strategy. The logic is that aligning equipment and processes with the 310×310 mm family can lower initial entry barriers and increase the possibility of securing customers. Since there is no specific standard, it means securing customers first by improving yield and reliability according to TSMC's standards.
However, if this structure is prolonged, there is a risk that the South Korean ecosystem will remain a latecomer, and equipment and material companies will become subordinate to TSMC's supply chain. Securing Samsung's independent leadership could also become difficult. Concerns are emerging that South Korea will ultimately lose dominance in the global PLP market to Taiwan.
Experts emphasize that Samsung Electronics must establish standards in the mid- to long-term to prevent such a situation. It means that if Samsung shows it can stably mass-produce high-end products at a specific size, equipment and material companies will align and move accordingly. Samsung Electronics has adjusted panel sizes multiple times over several years in consideration of warpage and productivity, but it is known that internal standards have not yet been established.
An industry expert said, “Samsung Electronics securing large-scale orders from AI Big Tech customers by obtaining stable yield and quality in high-end products is the top priority. Based on this, presenting a clear size and roadmap while guaranteeing long-term volume and joint investments for domestic companies is also necessary.”
