The open-source movement is rapidly reshaping the semiconductor intellectual property (IP) landscape, with artificial intelligence (AI) accelerators built on RISC-V--often dubbed the “Linux of hardware”--projected to grow at an annualized rate of around 41% through 2031. According to a recent RISC-V whitepaper published by SHD Group, a global semiconductor and AI market research firm, shipments of RISC-V-based AI accelerators reached 1.15 billion units last year. This volume is forecast to surge to 9.05 billion units by 2031, implying a compound annual growth rate (CAGR) of 40.9%. Total shipments of all RISC-V-based silicon are expected to jump from 6.88 billion units last year to 35.97 billion units by 2031.
As an open-source instruction set architecture (ISA), RISC-V has emerged as a disruptive alternative to proprietary architectures long dominated by Arm and Intel's x86. Its primary appeal lies in enabling companies to design custom silicon without the burden of expensive royalties or restrictive licensing fees. SHD Group noted that because RISC-V operates as an open standard, it offers exceptional design flexibility--a critical factor driving its accelerating adoption in the AI hardware market.
This flexibility allows fabless chipmakers to freely tailor and optimize architectures to meet specific functional and performance requirements. By contrast, legacy CPU architectures impose rigid constraints, often requiring developers to obtain new licenses whenever they make structural modifications to a core design.
RISC-V is also gaining significant traction in chiplet-based architectures, which integrate multiple modular dies, each handling distinct functions, onto a single substrate. With demand rising for heterogeneous integration--combining central processing units (CPUs), graphics processing units (GPUs) and high-speed memory interfaces into unified packages--open architectures like RISC-V offer clear integration advantages over monolithic, single-vendor solutions. Industry experts note that incorporating neural processing units (NPUs), the heart of modern AI accelerators, becomes substantially more seamless within a RISC-V ecosystem.
Underscoring this scalability, Nvidia announced plans last year to extend support for its CUDA computing platform to RISC-V-based CPUs, a move that could broaden developer access to AI acceleration on RISC-V systems. Meanwhile, RISC-V International, the global consortium stewarding the ecosystem, has set a goal of securing official ISO international standards within this year, marking a key milestone in its maturation as a mainstream compute architecture.
SHD Group emphasized that the core value proposition of RISC-V centers on independence, flexibility and acceleration. As an open ISA, it empowers companies to integrate bespoke IP with minimal licensing friction while fostering cross-border and cross-industry collaboration on an unprecedented scale.
